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BorderRouter.ned    76 lines (71 with data), 2.8 kB

// The MIT License (MIT)
//
// Copyright (c) 2014-2016 Brno University of Technology, PRISTINE project
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
// THE SOFTWARE.

//
// <h1>BorderRouter simulation module</h1> 
//
// This models simulates border router node that has five different rank DIFs:
//  * 1x (N+1)-DIF <i>relayIpc</i> is used as bridge between <i>ipcProccesses</i> for relaying
//  * 3x (N)-DIF <i>ipcProcess1/2/3</i> 
//  * 1x (N-1)-DIF <i>bottomIpc</i> 
//
// It also contains <i>DIFAllocator</i> module as NameSpaceManager interface
//
// @author Vladimir Vesely (ivesely@fit.vutbr.cz)
// @date Last refactorized and documented on 2015-01-12

package rina.src.CS;

import rina.src.DAF.DA.DIFAllocator;
import rina.src.DIF.IPCProcess;

module BorderRouter
{
    @display("i=abstract/router;bgb=281,341");
    @node;
    gates:
        inout medium[3];
    submodules:
        ipcProcess1: IPCProcess {
            @display("p=66,160");
        }
        ipcProcess2: IPCProcess {
            @display("p=223,160");
        }
        bottomIpc: IPCProcess {
            @display("p=146,280;i=,#FF4000");
        }
        relayIpc: IPCProcess {
            @display("p=146,39;i=,#FFB000");
            relay = true;
        }
        ipcProcess3: IPCProcess {
            @display("p=146,192");
        }
        difAllocator: DIFAllocator {
            @display("p=66,39");
        }
    connections:
        ipcProcess1.southIo++ <--> medium[0];
        ipcProcess2.southIo++ <--> medium[1];
        bottomIpc.southIo++ <--> medium[2];
        relayIpc.southIo++ <--> ipcProcess1.northIo++;
        relayIpc.southIo++ <--> ipcProcess2.northIo++;
        relayIpc.southIo++ <--> ipcProcess3.northIo++;
        ipcProcess3.southIo++ <--> bottomIpc.northIo++;
}